via indeed · 8 juni 2026 ·5 dagen geleden

Digital Design Verification Engineer (UVM)

TMC
Eindhoven
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Netherlands Electronics 5 \- 10 years Eindhoven Hybrid
We are looking for a highly motivated Digital Design Verification Engineer with strong expertise in SystemVerilog and UVM methodology, capable of building verification environments from scratch.

About The Member Company
We are a global high\-tech consultancy company with a team of entrepreneurial engineers, scientists, and digital experts from around the world. Together we form a fast\-growing and proud community. We offer consultancy services to high\-profile clients globally in diverse service areas, such as:

  • Technology \& Engineering

  • Energy \& Renewables

  • Life sciences \& Pharma

  • Digital \& IT

About this vacancy
----------------------

Key responsibilities:

  • Develop and deploy UVM\-based verification environments from scratch, including architecture definition, reusable components, and verification strategies

  • Create and execute test plans, test cases, and verification scenarios aligned with design specifications

  • Implement SystemVerilog testbenches, constrained\-random verification, functional coverage, and assertions

  • Perform debugging and root cause analysis of design and verification issues

  • Ensure coverage closure (functional and code coverage) and track verification progress

  • Collaborate with design engineers to improve design\-for\-verification and resolve issues early

  • Contribute to methodology improvements and drive best practices in verification

  • Support regression runs, automation, and CI/CD flows for verification environments
What we expect from you
---------------------------
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field

  • Minimum 5 years of industry experience in digital IC/SoC/FPGA verification

  • Strong hands\-on experience with: SystemVerilog \& UVM — including building testbenches from scratch

  • Proven experience in: constrained\-random verification, functional coverage and assertion\-based verification, and debugging complex digital systems

  • Familiarity with standard interfaces (e.g., AXI, APB, SPI, I2C, PCIe, or similar)

  • Experience with industry\-standard simulators (e.g., Questa, VCS, Xcelium)

  • Solid understanding of digital design concepts and RTL (Verilog/VHDL)
What you can expect from us
-------------------------------

TMC is an international high\-tech consultancy company that brings expertise to its clients in order to support them with the realization of their technological challenges. As such, TMC is operating as an expert center at the disposition of its clients and we help them to be more competitive in an ever more global and faster\-changing technological world. At TMC we believe that people are the driving force behind technological innovation. That is why we want to create the best possible conditions for tech talents to thrive in. We offer you a challenging and stimulating work environment in which you can be the director of your own career. As an Employeneur you are part of our TMC family. Next to our outstanding technical expertise, fun and engagement are meaningful parts of our culture.

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